Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Do the DMA controller parameters in Qsys all function properly?

I need help with how to correctly set up the dma controller in order to get the maximum data speed between onchip to SDRAM. The current goal is to transmit 60MBytes/sec. I've tried setting the burst ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

What do you mean by setting it up to go very fast? The goal is to be able to write to the entire sdram using dma. Right now, I'm only transmitting 256 bytes from on-chip to sdram, but that's in a loop to test for transmitting 4MB and even with that I'm getting incorrect bytes when reading the sdram.

--- Quote Start ---

I agree that you should use signaltap to check what is going on. It's also a very good method to check whether the changes you make to the system has any impact.

But with such a low bandwidth I don't think that changing the FIFO depth or burst transaction size will do any good. It looks more like a software problem. How much do you keep the DMA busy? If you set it up to go very fast but have a lot of software processing between two DMA transfers then the result bandwidth will be quite low. How big are the memory blocks you transfer from one memory to the other?

Is the onchip ram accessed from another place at the same time? In that case it can be a good idea to make it dual port and use a port exclusively with the DMA.

--- Quote End ---