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Altera_Forum
Honored Contributor
14 years agoDelay in receiving a byte in SPI slave rxbuffer
Hi, I am currently working on a project in which I am interfacing the ANT transceiver (AP2) to the Altera DE2 board through SPI.The ANT transceiver is the master SPI and altera FPGA is the slave S...
Altera_Forum
Honored Contributor
14 years agoHello,
Thanks for the reply! Actually I solved the issue. I figured out that in the slave SPI of NiosII, the slave select line always has to go high in order to store a byte in the rxbuffer. Initially I had grounded it so that the slave SPI is always selected . But in that configuration the slave SPI didn't reset itself and ignored the MOSI byte. So now after I pull the slave select line low, I pull it high after a delay in order to receive the byte on MOSI line.