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Honored Contributor
Honored ContributorCyclone V SOC F2S Arbitration
Hello, In my Cyclone V SOC device I have an F2S bridge implemented to facilitate memory sharing between the FPGA and HPS. The base address I'm using is 0x30000000. The FPGA writes images to...
Altera_ForumHonored Contributor
Honored ContributorSounds like issues with the U-BOOT's configuration of the F2S bridge...
Most reference designs I've seen have the BSP configured to work with the F2H bridge (not the F2S). We invested a lot of effort to make it work with the F2S.
