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Altera_Forum
Honored Contributor
8 years agoCyclone V SoC doubt
Hi, I will have to program a RISC-V processor and I wanted to know if it's possible to access to ARM Cortex-A9 L1 and L2 caches or if I will have to use FPGA memory as cache. Also, I wanted ...
Altera_Forum
Honored Contributor
8 years ago --- Quote Start --- Ericv, In that case I will have to use RAM memory as an L1 and L2 caches for my project because ARM Cortex-A9 can't be programmed in VHDL. As I understand having a SoC FPGA allow us to use a high computation algorithm in the processor while the FPGA is doing some data processing or controlling real time systems with a high bandwidth between both, am I wrong? Thank you, Joel --- Quote End --- A SOC FPGA is just a hybrid combination of a CPU device and an FPGA device. There have been standalone ARM CPU chips for quite a while, as well as FPGA devices. The SOC (system on chip) basically just merges together a dual core ARM CPU chip and an FPGA (it is actually a lot more complex than that, but if you squint at a block diagram that is what it looks like). ARM is the CPU of choice for SOCs (both Intel/Altera and Xilinx) because of the nature of ARM Co's business model of initially supplying design IP to customers rather than silicon devices. ARM also more or less has a lock on 'pure' SOC devices like those from Broadcom (think Raspberry PI) and Qualcomm (think Android smartphones).