Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Cyclone V SoC doubt

Hi, I will have to program a RISC-V processor and I wanted to know if it's possible to access to ARM Cortex-A9 L1 and L2 caches or if I will have to use FPGA memory as cache. Also, I wanted ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Ericv,

In that case I will have to use RAM memory as an L1 and L2 caches for my project because ARM Cortex-A9 can't be programmed in VHDL.

As I understand having a SoC FPGA allow us to use a high computation algorithm in the processor while the FPGA is doing some data processing or controlling real time systems with a high bandwidth between both, am I wrong?

Thank you,

Joel