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Altera_Forum
Honored Contributor
Honored ContributorCyclone V SOC ARM DMA
Hello, Does the Cortex ARM A9 processor of the Cyclone V SOC FPGA have a hard silicone DMA ? If so, can this DMA be configured to access data from the FPGA through the H2F 128 bit bridge ?
Altera_ForumHonored Contributor
Honored ContributorIt is not efficient if you are depending on it to move large volume of critical data (needed for the system processing, for example). Also looking at the example here:
https://rocketboards.org/foswiki/view/projects/datamover The H2F bridge is running at 128-bit width to the FPGA at 133.33MHz (~2.1GB/s of bandwidth) vs the DMA which is running at 64-bit width to the L3 Interconnect at L4 clock of 100MHz (~0.8GB/s). If I am not mistaken the DMA is still useful to perform task such as moving the FPGA rbf image for programming the logic (where you boot HPS first, then program FPGA). Just probably not for bandwidth-starved applications :)
