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Altera_Forum
Honored Contributor
Honored ContributorCyclone V, sharing memory between FPGA and HPS
Hello. I'm using de0-nano-SoC and want FPGA and HPS to have access to the same memory. I use GHRD as base project. In Qsys I have activated "enable in-system memory content editor" to see how it work...
Altera_ForumHonored Contributor
Honored ContributorI see... There is one instance in soc_system.v file. This way I see two instances in in-system memory editor.
Is it correct way if I write code inside soc_system.v to use this instance? Or here is another way how I can interact with this RAM on FPGA side?
