Altera_Forum
Honored Contributor
21 years agoCould use some advice
I'm vetting an interesting new development board that is about to be released for sale. The board has a Cyclone, two separate SDRAM chips, FLASH, USB LS/FS, 10/100, RTC + battery, 54 GPIO and an SD/MMC connector. It's a bit smaller than a credit card to boot.
The dual SDRAMs allow easy implementation of dual processors, or a single processor with harvard architecture, or... There are choices. I'm trying to get uClinux to run on this puppy using just one SDRAM. I posted previously and that helped eventually get to a point where I can get the kernel to build. I've also loaded it successfully to the FLASH chip, and also loaded a file system into FLASH. Now comes the fun. I haven't had any luck getting it to boot. I download an .sof into the FPGA but get zippo out of the JTAG UART, or a standard serial port that I added in. I've tried numerous combinations of reset addresses and devices, exception addresses, etc. and get the same results -- zip. I've tried the largest NIOS2 core, and also the economy small core with no cache. Since this forum has proved helpful in the past, I was wondering if anyone had any advice for me now? BTW, I'm completely useless with linux anything (I'm a HW design guy) so you may need to use sock puppets or somesuch to help explain things to me. Thanks!