Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
22 years ago

Connect different WR#/RD# signals together

Hello,

When placing for example ext_ram (IDT71V416), ext_flash (Flash memory with CFI) and lan_91C111 (LAN91C111 Interface) in the SOPC Builder to one Master (cpu) the builder will create different RD# (ior_n_to_the_lan91c111, ext_ram_bus_read, read_n_to_the_ext_ram) and WR# (iow_n_to_the_lan91c111, write_n_to_the_ext_flash, write_n_to_the_ext_ram) signals for each device.

What do you think about connecting these signals with an AND for saving some (in this case four) IOs? I think it is possible because choosing one of these devices will be done with the chip select signals. Or is there another way to force the SOPC builder to make only on RD# and WR# for the whole external bus?

RD# = ior_n_to_the_lan91c111 AND ext_ram_bus_read AND read_n_to_the_ext_ram

WR# = iow_n_to_the_lan91c111 AND write_n_to_the_ext_flash AND write_n_to_the_ext_ram

Best regards,

niosIIuser

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    22 years ago

    I´m not shure but I think,

    "ext_ram_bus_read_n" should be a signal,

    which is low if any read access is on the bus, normally you should

    can connect this signal as a shared signal to all three devices.

    if there is another write signal in your system, which is marked as shared,

    then you will also get a signal ext_ram_bus_write_n, which is low if there

    is a write access to the bus,

    this signal can also be connected to all devices.

    , so it should not be necessary to "and" the signals together.

    You can check the ptf files of the devices to see if the write/read signals

    are marked as shared.

    to see the path to the ptf file, right click the component in the tree view and

    see "Component Details"

    I hope there will also be an answer from an altera expert.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    22 years ago

    Hello Fischer,

    Thank you for your reply. I found the shared information in the ptf files of the components and will try to change these setting and rebuild the project when the new hardware is ready. It’s very likely that it’s working but I wonder why this (using one RD# and WR#) wasn’t done in the development board. Perhaps the developer wanted to make a board with all possibilities to change anything.

    Bye,

    niosIIuser