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So shouldn't there be a way to program both the .pof from Quartus and the .elf from Nios at the same time? I want them both to be stored in the EPCS and loaded from the EPCS.
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Yes... You add the SOF to a JIC file, create a HEX file from the ELF (at an offset determined by the bootloader you use) and add it to the JIC as well and then use the QII Programmer to program the JIC to the EPCS device. You can make use of elf2flash to create an SREC and then nios2-elf-objcopy to create and re-locate the HEX that you add to the JIC file.
I seem to recall a document describing this process....somewhere. I'll have a look and see if I can't dig something up.
The FPGA image (SOF) is loaded automagically from the EPCS and, once this is done, the Nios II processor starts trying to execute instructions from its Reset Address...which is where the bootloader needs to be. Basically, you have two options....either modify the existing EPCS bootloader (and keep the Reset Address pointed to the epcs_controller) or create your own small onchip memory and use the code that I attached previously. Regardless of which approach you choose, the Nios II processor copies your "real" program from the EPCS to (presumably) some sort of offchip memory.
Of course, all of this changes if your code is small enough to fit in an onchip memory. Then your code can become part of the FPGA image (SOF) that is initially programmed into the FPGA and the bootloader is not really necessary.
Long story short...it will be a gigantic pain in the butt to develop in this fashion. How hard would it be to dead bug some sort of JTAG connection onto your board?
Regards,
-- slacker
Honored Contributor
