Forum Discussion
Altera_Forum
Honored Contributor
15 years ago --- Quote Start --- I had associated a custom component (A variation of the DCFIFO example available in AN 473) to my NIOS 2 System. I use the Avalon MM (Slave) Interface whit the current signals: Readdata (32bits) out Read (Used as the component read clock) IN Everything goes right to me, till i try to read some data from the nios 2 software. (I use the HAL, avoiding any OS) I can find the base address in System.h
#define DCFIFO_DE_TOP_0_NAME "/dev/dcfifo_de_top_0"# define DCFIFO_DE_TOP_0_TYPE "dcfifo_de_top"# define DCFIFO_DE_TOP_0_BASE 0x00400000# define DCFIFO_DE_TOP_0_SPAN 4# define DCFIFO_DE_TOP_0_TERMINATED_PORTS ""# define ALT_MODULE_CLASS_dcfifo_de_top_0 dcfifo_de_top
But, when i try to read some data from the component using the IORD macro IORD(DCFIFO_DE_TOP_0_BASE,0);I only get zeros. I know that i am missing something but i can't figured out what... } Anything you can point will be useful. jairo --- Quote End --- Hi I am also adding an avalon memory mapped slave, but not the FIFO one, to my nios 2 system. When I build my C code, everything is fine but cant run on hardware and I get this error message: There are no Nios II CPUs with debug modules available which match the values specified. Please check that your PLD is correctly configured, downloading anew SOF file if necessary. Please...Do you know what coud be the problem?