Can a multiprocessor system run code...

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originally posted by bkucera@May 22 2006, 05:39 PM

the system compiled fine, but when i tried to run software it would tell me that one of the processors did not exist in the sopc builder system, even though it clearly did. so now i have both processors executing their code out of sram and that works, although it's hurt my fmax quite a bit for some reason.

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I never tried a configuration like that, but I suspect there should be nothing strange...

does the error appears when creating the system library, when creating the application, when compiling it or when running it?

Paolo

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originally posted by paolo.gai+may 22 2006, 11:05 am--><div class='quotetop'>quote (paolo.gai @ may 22 2006, 11:05 am)</div>

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<!--quotebegin-bkucera@May 22 2006, 05:39 PM

the system compiled fine, but when i tried to run software it would tell me that one of the processors did not exist in the sopc builder system, even though it clearly did. so now i have both processors executing their code out of sram and that works, although it&#39;s hurt my fmax quite a bit for some reason.

<div align='right'><{post_snapback}> (index.php?act=findpost&pid=15501)

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I never tried a configuration like that, but I suspect there should be nothing strange...

does the error appears when creating the system library, when creating the application, when compiling it or when running it?

Paolo

<div align='right'><{post_snapback}> (index.php?act=findpost&pid=15503)</div>

[/b]

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It only appears when attempting to run the application. The Nios IDE will build the application successfully.

Is there a better way to do this that I&#39;m not considering? It seems that for maximum performance each CPU should execute code out of a different memory so there&#39;s no conflict.

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originally posted by bkucera@May 22 2006, 11:22 PM

it only appears when attempting to run the application. the nios ide will build the application successfully.

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Ok... Can you please report the error given by the IDE? It&#39;s hard to figure out the problem without an error message...

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originally posted by bkucera@May 22 2006, 11:22 PM

is there a better way to do this that i&#39;m not considering? it seems that for maximum performance each cpu should execute code out of a different memory so there&#39;s no conflict.

<div align='right'><{post_snapback}> (index.php?act=findpost&pid=15512)

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Yes, that&#39;s true... otherwise if the application do not fit in onchip memory you should use cache memories to limit the impact of the traffic on the bus...

bye

Paolo

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originally posted by paolo.gai@May 23 2006, 01:18 AM

ok... can you please report the error given by the ide? it&#39;s hard to figure out the problem without an error message...

yes, that&#39;s true... otherwise if the application do not fit in onchip memory you should use cache memories to limit the impact of the traffic on the bus...

bye

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I get the error when one of the projects in my multiprocessor collection tries to run. It says that the cpu specified for that project doesn&#39;t exist in the SOPC builder design. I think it&#39;s given me the error for both CPUs at different times, possibly only for the CPU that isn&#39;t hooked to the JTAG though.

One of my applications only needs about 15KB, the other needs about 500KB. So my plan was to run the 15KB one out of onchip memory, and the 500KB one out of SRAM.

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originally posted by bkucera+may 24 2006, 07:12 pm--><div class='quotetop'>quote (bkucera @ may 24 2006, 07:12 pm)</div>

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i get the error when one of the projects in my multiprocessor collection tries to run. it says that the cpu specified for that project doesn&#39;t exist in the sopc builder design. i think it&#39;s given me the error for both cpus at different times, possibly only for the cpu that isn&#39;t hooked to the jtag though.[/b]

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that&#39;s quite strange... maybe a problem in the debug configuration in the nios ii ide?

<!--quotebegin-bkucera@May 24 2006, 07:12 PM

one of my applications only needs about 15kb, the other needs about 500kb. so my plan was to run the 15kb one out of onchip memory, and the 500kb one out of sram.

<div align='right'><{post_snapback}> (index.php?act=findpost&pid=15554)

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Yes, that&#39;s should not be a big problem...

Paolo

First off yes you can execute one CPU out of onchip memory and another from SDRAM. Or you can execute both of them from seperate onchip memories or both from SDRAM or whatever you want. So that out of the way.

I can&#39;t see your system but from your description there are two things I would check first.

1 - Is the debug configuration set up properly for each processor in the NIOS IDE?

2 - Does your second NIOS II CPU have a jtag debug module? If not then it will not be recognized on the JTAG chain and you will not be able to download and execute code to it from the NIOS IDE.