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Altera_Forum
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14 years ago

Cache Implmentation

Hi All, I'm working on a research project involving NiosII processor. We need to be able to control cache bypass signal. Can any of you guide me how to do that? I need to instantiate the Nios...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

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You can certainly run a 68020 with its I-cache disabled! and probably some of the ARM cores. Any x86 chip - especially in 'real' mode.

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Great. Do you remember which ARM cores have this feature?

Do the ARM cores that comes in some Altera's FPGAs support that?