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Altera_Forum's avatar
Altera_Forum
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14 years ago

Cache Implmentation

Hi All, I'm working on a research project involving NiosII processor. We need to be able to control cache bypass signal. Can any of you guide me how to do that? I need to instantiate the Nios...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

You can't separate the caches from the processor itself.

For systems without the mmu, the cache can be bypassed by either using the ldio/stio instructions or setting the most significant address bit.

The altera documentation for the cpu explains all of this.