Burst transfer from memory to Nios II

Yes, Altmemphy supports bursting, it should be called "local burst size" or something along those lines in the wizard that pops up on the screen. That said, now that there is the high performance 2 controller option I never use bursting with the Nios II processor and DDR memories.

Instead I set the local burst size to 1 (nonbursting) and then increase the arbitration share of the instruction and data master to 8 to match my cache line size with the Nios II bursting disabled. The HP2 controller will take those sequential back to back transfers (arbitation share will make sure the master has the opportunity to present 8 back to back transfers) and condense them into the optimal offchip burst of 4/8 beats. This ensures that I don't have burst adapters dropped down all over the place in my system and shifts all the complexity off to the memory controller instead.