Avalon-MM-Slave address alignment

IIRC the Nios won't generate burst transfers either (except maybe for cache line transfers).

So qsys will probably have added a burst adapter!

Personally I'd just define the correct values and ignore the Altera definitions - they just confuse things.

qsys will show a base address for your slave of (say) 0x123000, fix this rather than letting qsys assign the addresses.

In your header file:

#define MY_SLAVE_BASE 0x123000
struct {
    volatile unsigned int    reg_0;
    ....
} my_device registers;
extern struct my_device *my_device;

In your source, and assuming you aren't using the MMU:

struct my_device *my_device = (void *)(0x80000000 | MY_SLAVE_BASE);

Then you can access my_device->reg_0 the same as any other variable.

The fabric will convert the low address bits into byte enables for you.

But note that the nios always does 32bit reads, char/short writes will assert the expected byte enables.