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Altera_Forum
Honored Contributor
Honored ContributorAvalon-MM Master reading
Hello, I am trying to run Avalon-MM master to read data from memory chip, so I've written a code accessible here: http://paste.org/41475 When I try to count data when readdatavalid is asserte...
Altera_ForumHonored Contributor
Honored ContributorHi,
Is there a pipelining in your memory ? The lock might mean that the asserted read doesn't guarantee that you actually read datavalid on the bus. so when waitrequest is deasserted, the datavalid is low and your counter doesn't count. (It's just an assumption). all this is a bit tricky to manage the bursting access. In Qsys, it's automatically done for you by setting the burst count in the slave access arbitration (right click, show arbitration). Hope this helps...
