automated building

Hi all,

I am wondering about the possibility of automated build processes for the NiOS board.

I am looking both at the process for FPGA designs and for C files.

For FPGA designs:

I understand that there is powerful commandLine scripting available; for example quartus_map, quartus_fit, quartus_tan, quartus_asm commands. And also the availability of TcL (tool command language).

For C files:

I am specifically looking at nios-build and nios-run that is called from the cygwin shell.

Perhaps a bit more background on what I am attempting to do.

I am in the process of creating a simple application that would allow the user to simply click their way thru the flow from compiling to dumping onto the NiOS board. Automated building with feedback in terms of the standard feed back of warning and error msg. Sounds rather simple but in order to do this I will need to invoke the above commands.

For FPGA designs the tools available in the commandLine scripting seem adequate. But has anyone real life examples or suggestions on getting started? Drawbacks and what to look out for? Examples even?

For nios-build & nios-run I cant seem to find relevant information. I don’t even know if it is possible to invoke them from another application thru Cygwin.

Google and the Altera website are lacking in practical information especially those of examples. What are the experiences of those on this forum when attempting something like this.

Thanks in advance guys

Here’s the doco on commandLine scripting:

http://www.altera.com/literature/hb/qts/qt...ts_qii52002.pdf (http://www.altera.com/literature/hb/qts/qts_qii52002.pdf)