arria v using DMA through ACP

I am trying to make cache coherent dma copies by using the ACP port on the arria v.

I am copying only from the first Gigabyte of memory.

I am using the cyclone v preloader that comes with the EDK installation.

I followed the steps in the arria v HPS TRM in chapter 9 subsection "AXI Master Configuration for ACP Access" on page 28-29 in order to use the ACP.

So far i have:

1. Enabled the SCU by setting the SCU enable bit in the SCU Control Register at 0xFFFEC000

2. Marked the memory shareable and cache able(write-back allocate on write)

3. Enabled the caches

4. Initialized the MMU and populated the MMU page table

5. Set the SMP bit in the ACTLR

6. Set the shared attribute override enable bit the in the auxiliary controller register in the L2 cache controller

7. Flushed the L2 cache after setting the shared attribute override enable bit as mentioned in the L2 310 cache controller documentation on arm's website

8. Configured ARUSER and AWUSER signals(configured as 11111 in binary to PAGE 0 using the ACP ID Mapper.

9. Added 0x80000000 to the source and destination addresses in order for the DMA to pass through the ACP window.

I am using altera's HW library to use the DMA, ACP ID mapper,MMU and caches.

Now i am doing a simple test so that i copy from a source buffer with predefined data to destination buffer and then comparing using memcmp.

Both the source and the destination buffers are zeroed before i fill the source buffer with the predefined data

The test works only when the source buffer are from the heap and was allocated by malloc or when it is a global variable.

When the source buffer is from the stack the memcmp fails and when checking it's content some of the cells having the 0 value(meaning the copy on those cells didn't succeeded).

How can i use the ACP with source buffer from the stack?