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PHJ
Occasional Contributor
7 years agoArria 10 HPS I/O Pin Multiplexing configuration
The A10 HPS technical reference manual has the following note for each of the pinmux configuration registers (e.g. pinmux_uart0_usefpga) : "NOTE: These registers should not be modified after IO con...
PHJ
Occasional Contributor
7 years agoThanks Alex (@a_x_h_75) . Can I assume that the HPS can update these pinmux configuration registers after the FPGA has started, but the IO functionality will only work when the HPS configures the same pinmux setup as the FPGA code has been compiled for ?