Hi, Is there any trick to using the ACP port from FPGA under Linux (3.9)? I'm setting the f2h AR & AW CACHE/PROT/USER by hand, post-qsys, but don't see any indication that the SCU cares at all about the address I send on f2h_axi_slave and reads go to SDRAM instead of L1 or L2 cache. Thanks

The answer turned out to be surprisingly simple. Make sure the physical address passed by the driver to the FPGA accelerator is "| 0x80000000". This puts the address in the ACP range. Otherwise, the address bypasses the SCU. This also allows one to test performance with and without the ACP by simply changing the address at runtime. Thanks to LegUp for the solution: http://janders.eecg.toronto.edu/pdfs/euc14.pdf Note: cache attributes set by hand in the top level HDL after Qsys compile are: .f2h_ARCACHE (4'hf) .f2h_ARPROT (3'h0) .f2h_ARUSER (5'h1f) .f2h_AWCACHE (4'hf) .f2h_AWPROT (3'h0) .f2h_AWUSER (5'h1f) ACDS is 14.0.

--- Quote Start --- The answer turned out to be surprisingly simple. Make sure the physical address passed by the driver to the FPGA accelerator is "| 0x80000000". This puts the address in the ACP range. Otherwise, the address bypasses the SCU. This also allows one to test performance with and without the ACP by simply changing the address at runtime. Thanks to LegUp for the solution: http://janders.eecg.toronto.edu/pdfs/euc14.pdf Note: cache attributes set by hand in the top level HDL after Qsys compile are: .f2h_ARCACHE (4'hf) .f2h_ARPROT (3'h0) .f2h_ARUSER (5'h1f) .f2h_AWCACHE (4'hf) .f2h_AWPROT (3'h0) .f2h_AWUSER (5'h1f) ACDS is 14.0. --- Quote End --- Hi Sir, I am trying to interface a program executed from linux to a FPGA master, I need to use the ACP port, I changed the cache attributes as you said. But What I am not sure is what physical address to map in map linux program or what address send to the FPGA master I have developed. I will appreciate any help you can give me! Thanks.

Hi Sir, I am trying to interface a linux program to a FPGA master using the ACP port, what address do I need to use to ensure read and writes go through the ACP port? Actually I am not familiar with using the ACP port at all, if you can give me some guide, I will appreciate it. I configured the AXI port cache settings as you said. Any example or reference where I can find information related to it. Thanks.

--- Quote Start --- Hi Sir, I am trying to interface a linux program to a FPGA master using the ACP port, what address do I need to use to ensure read and writes go through the ACP port? Actually I am not familiar with using the ACP port at all, if you can give me some guide, I will appreciate it. I configured the AXI port cache settings as you said. Any example or reference where I can find information related to it. Thanks. --- Quote End --- Hi norxander, For access to ACP port, my driver code looks like (literally): dma->csr[2] = c->dma_currimage.write_buf_phys_addr | 0x80000000; The bit-wise OR was the only trick. However, I found the ACP speed slow and I gave up on ACP port and used the much faster FPGA-SDRAM ports. I've heard rumors that ACP port has a design flaw that will be fixed. My notes apply to Cyclone 5 SoC 5CSXFC6D6F31C8ES and you'll find best performance there by using the FPGA-SDRAM ports and using driver calls dma_sync_single_for_device/cpu on buffers shared between FPGA and CPU. Best wishes

Thanks for you quick reply Sir. Now, why did you say the FPGA-SDRAM port is faster than ACP port, I have read that by using the ACP port you can get data that is cached, so you don't have to read/write data to the DDR SDRAM in some cases. I am using the DE1-SoC board. If by using the FPGA-SDRAM ports I will get better performance, can you explain me how to use the dma_sync_single_for_device/cpu functions. I am working of a project where I have a user application which will send some information to the FPGA module I have developed (some like a DMA module, but it doesn't move data in the way *dest++ = *src++), so how can I allocate physical memory that I can share between the FPGA and CPU? and what it the use of the dma_sync... functions?

ACP port under Linux | Altera Community

23 Replies

Altera_Forum
Honored Contributor
10 years ago
Hi, do you know a way to allocate 64MB of contiguous RAM to a device driver on Linux? I was using the alloc_pages but it only allowed me to allocate 4MB.

Thanks.
Altera_Forum
Honored Contributor
10 years ago
Hello,

When using the SGDMA to test the ACP port, and also the SDRAM controller, what is the maximum frequency you could use in order to get the SGDMA system working? You said in a previous post that you used 150 MHz, is is possible to use something greater than that?

Thanks.
Altera_Forum
Honored Contributor
8 years ago
--- Quote Start ---
Hi, do you know a way to allocate 64MB of contiguous RAM to a device driver on Linux? I was using the alloc_pages but it only allowed me to allocate 4MB.

Thanks.
--- Quote End ---

You can reserve a block of memory using the device tree:

https://www.kernel.org/doc/documentation/devicetree/bindings/reserved-memory/reserved-memory.txt

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ACP port under Linux

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