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Altera_Forum's avatar
Altera_Forum
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15 years ago

Achieving higher performance?

Hello i want to make my design as fast as possible to run uCLinux, my software is running at 40ms and should run at 8ms. I am using a linux with MMU, 50mhz clock, 32k Data and instruction Cache...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Possibly you had problems with the internal memory regions, using a few less M9K blocks might help.

I think a pipeline bridge (or even a non-pipeline bridge) can be used to:

1) reduce the number of complex slave arbitors by putting multiple slaves behind the bridge.

2) allow you to run some slaves at a lower clock frequency.

Both will increase the time taken to access the bridged slaves.

It ought to be possible to use the timing tools to work out the critical path. But I'm a software engineer... :-)