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Altera_Forum's avatar
Altera_Forum
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16 years ago

About the address setting

Hi all: I'm a new worker on NIOS,I'm using a CycloneIII starter board and followed a sopc class.I have some basic questions about NIOS and SOPC. First:My board have a CFI flash and a SSRAM...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

I've never useda CFI flash (I use serial configuration devices) but IIRC you are right. The FPGA image starts at address 0x20000 in the flash, and the CPU starts at offset 0x20.

It can be difficult to fit your application in such a short space, so you should either insert some code at address 0x20 that jumps to another address higher in the flash (after the FPGA image) or use a bootloader that will copy your application to RAM.

The second option is easy to implement, you just have to configure your project so that the .text section (the one containing the code) is placed in RAM, but still put the reset vector in the flash. Then the Nios flash programmer will create a bootloader that will take care of everything for you.

You can have a look at an458 (http://www.altera.com/literature/an/an458.pdf?gsa_pos=1&wt.oss_r=1&wt.oss=nios%20boot) for more details.