About SDRAM clock ! ?

I agree with BadOmen -- you can certainly run CPU & SDRAM at different speeds, but if the CPU is using that memory for instructions or (primary) data, then they should be on the same clock domain. Besides, Nios II & the SDRAM controller will typically run at the same f-max, so I don't see why you'd want to run the processor slower?

The reason for this is that the clock-crossing logic adds delay; while you may be running one interface faster, it takes longer to access it.

Now, there is a case I can think of where running the memory at a different speed than the CPU would be desirable: if you have a piece of custom hardware which has an f-max much higher or lower than tha processor (and therefore is driven by its own clock) and it needs to access memory at maximum bandwidth -- then you would want to run your custom hardware and memory controller with the same (different from the CPU) clock.

Where the clock domain crossing feature is most powerful is for a system with one or more very slow interfaces that are not in the data path -- that way you can keep your processor/memory/other logic running as fast as possible and use a separate clock for the slower logic.