Hi SimKnutt and BuGless,
May I take the freedom to answer the question since Simknutt already had explained that and also responded to the other thread about schematics and referred to me - many thanks.
The idea of Simknutt is quite simply this - as I understood it last year:
use mutiple parallel simplified mini-processors to implement the FPGA design instead of hdl or anything else.
FPGAs are rich in memory and if softwrare takes say "n" clock cycles then using "n" parallel processors will result in equivalent functionality of hardwiring !!
The concept is not new but seems sensible as any mutiple processor system, but surely altera or xilinx or somebody else would have quite easily gone that way if it was worth it. It will need substantial supporting tools before the field designer is told to steer away from hdl by their bosses.
Already there are tools that translate C to HDL or C to bitstream and surely they will exploit parallelism. None has the attraction of handcrafting available to the hardwirer.