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Altera_Forum
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15 years ago64bit ddr2 conflit with lan91c11
Hello in my design, I use a ddr2 high performance controller, DQ is 32bits, so local interface is 64 bit. and I also use a lan91c11. before generation, there is no any base address conflict. b...
Altera_Forum
Honored Contributor
15 years agoIf the master and memory are on different clock domains then SOPC Builder will insert a clock crossing adapter. This adapter doesn't support pipelined transactions so your memory performance will drop a lot. To avoid this you can use the clock crossing bridge which will have a little bit more latency but it'll allow back to back transactions through it.
If you care about the performance of the Nios II processor I would suggest trying to operate the processor and memory at the same clock speed to avoid any clock crossing. Clock crossing transfers adds a lot of latency so keeping both cores on the same clock domain may give you better performance.