1S10 dev. board and MAX Freq.

Sounds like you're progressing along just fine. If you are seeing > 100 with the /s core in Stratix (1s10es) and the critical path reports are in the ALU, you're pretty close to achieving maximum performance. The /f should give you some additional speed.

Also, try the following quartus options to improve performance slightly (lengthens compile time) - in Quartus fitter settings, turn on the following:

- Perform physical synthesis for combinational logic

- Perform register duplication

- Perform register retiming

Also make sure you're not using the "fast fit" option (great for speedy compiles when you don't need max f-max, but should not be used for best clock speed).

Finally, to extract the last few percent performance, try the Quartus "design space explorer" tool. This is an automated way of re-compiling a design over and over using different fitting tweaks to see which one is the best.