Forum Discussion
Altera_Forum
Honored Contributor
10 years agoHi,
I have solved Problem 2: simulating test bench after ,,Triple-Speed Ethernet MegaCore Function User Guide'', Chapter 10: - launching Quartus II, open project generate_sim.qpf from directory TSE_MegaCore_testbench - on the Tools menu, I select Tcl Scripts and select the generate_sim_vhld.tcl file and I clicked run - message ,,Tcl Script File C:/Users.../generate_sim_vhdl.tcl executed'' and then I have to start ModelSim from the desktop (not from Quartus - this causes an error), navigating in the Transcript window to the folder, where is run_TSE_MegaCore_tb.tcl stored (C:\Users\...\FPGA_Ethernet_Funktion\FPGA_Ethernet_Funktion\TSE_MegaCore_testbench\testbench_vhdl\TSE_MegaCore, type ,,cd'' for changing directory, type ,,dir'' to see the directories and files of the current folder) and type ,,do run_TSE_MegaCore_tb.tcl'' in the transcript window. Compilation of needed files is done automatic and simulation works fine! Greetings, Matthew