why do I see packets on the user side of the 25G MAC when no fiber is plugged in?

HI Mark, You can generate the example design by clicking "generate example design" button in 25G IP GUI. Below is the doc link for the example design for your reference. https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-dex-s10-25gbe.pdf What I meant by "Ethernet connection setup on board system" is if you can draw some high level diagram on how FPGA 25G Ethernet Tx port and RX port is connected to external world then it may help forum community to figure out what's the possible external source that generate the unknown Rx data return. Thanks. Regards, dlim