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SimonRichter's avatar
SimonRichter
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Where is the legacy interrupt enable/disable flag?

I'm trying to trigger an interrupt from a CycloneIV GX, using either an MSI if available, or a legacy interrupt. I've found the "MSI master enable" in cfg_msicsr(0) to know whether I should send MSIs...
SengKok_L_Intel's avatar
SengKok_L_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,

By referring to the user guide, the cfg_prmscr only provides the information of the PCIe status, but not the command register info. One suggestion is to refer to the cfg_msicsr[15:0] so that we can determine whether the MSI is enabled.

Regards -SK

  • SimonRichter's avatar
    SimonRichter
    Icon for Occasional Contributor rankOccasional Contributor
    5 years ago

    Yes, MSIs appear to work, and cfg_msicsr(0) tells me that they are enabled.

    For the case where MSIs are not supported on the host, I'd have to fall back on legacy interrupts though. The documentation says that the host is allowed to switch between legacy and MSI interrupts by enabling one mechanism and disabling the other, so I would expect the host to disable legacy interrupts when it activates the MSI.

    So now I'm wondering how that would appear to me inside the FPGA. I think I should be able to pick this up from cfg_prmcsr(10) going to '1', but I'd like some confirmation that this is a reliable method.