Forum Discussion
what's the main concern to set or not set associated clk and reset
- 6 years ago
The Component Editor knows nothing about the functionality of your custom component. As such, you have to specify the standard interface signal roles of your top-level ports (clock, reset, etc.) and the associated clock and reset for each standard interface (Avalon, AXI).
For the example you mention, it sounds like those signals are making up a conduit instead of a standard interface, confirmed by your screen capture. As such, associated clock and reset are not required for this type of interface. I think you may see warnings if you use the component in a system, but they're just warnings, not errors. You can set associated clock and reset since the Component Editor gives you the option, but I don't think it will cause any issues if you don't.
#iwork4intel
Hi, Xiaoqiang
May I know which Quartus version and which particular SPI IP you use ?
Normally, you don't have to enter the clock and reset manually, you can do the reset and clock connections directly in Platform Designer.
Thanks.
Eric
- XQSHEN6 years ago
Occasional Contributor
Quartus Prime 18.0 standard.
I don't use your standard IP. It's defined by myself using component editor.