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hb0001's avatar
hb0001
Icon for New Contributor rankNew Contributor
6 years ago

what do you mean by "single I/O column" in Stratix 10 GX fpga?

I didn't get the line in EMIF IP manual "Ensure that the pins of a single external memory interface reside within a single I/O column." Please explain..
sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
6 years ago

The I/O columns are how they're organized on the chip die. They're not a 1-to-1 match with the pins.

#iwork4intel