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alinave's avatar
alinave
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5 years ago

What are some possible causes for EMIF IP for DDR4 Error "iossm_bf_cpu_cpu_test_bench/ihp_read is 'x'" during calibration for a non-HPS EMIF IP?

https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/emif/2018/error--iossm_bf_cpucputestbench-ihpread-is--x-.html The above answer record mentions that the ...
NurAida_A_Intel's avatar
NurAida_A_Intel
Icon for Frequent Contributor rankFrequent Contributor
5 years ago

Hi Naved,

Thanks for the confirmation regarding memory model. I reached out to our internal engineering team for assistance and they are telling me we do not support vendor models since they have very stringent checks trigger during calibration. I also re-confirmed the statement on our documentation and it does state that we do not support these models. See Below.

Sincerely sorry I do not have better news for you. But, please let me know if there is anything more I can help.

Thanks

Regards,

Aida

alinave's avatar
alinave
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5 years ago

Hi Aida,

I tried the Intel provided model and the earlier version of xcelium but got the same error at exactly the same time..

Thanks,

Naved

  • NurAida_A_Intel's avatar
    NurAida_A_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    5 years ago

    Dear Naved,

    Please accept my apology for the delay in response due to recent workload.

    Is it possible to have the design (with Intel provided model) to look closer?

    Thanks

    Regards,

    Aida