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alinave's avatar
alinave
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5 years ago

What are some possible causes for EMIF IP for DDR4 Error "iossm_bf_cpu_cpu_test_bench/ihp_read is 'x'" during calibration for a non-HPS EMIF IP?

https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/emif/2018/error--iossm_bf_cpucputestbench-ihpread-is--x-.html The above answer record mentions that the ...
NurAida_A_Intel's avatar
NurAida_A_Intel
Icon for Frequent Contributor rankFrequent Contributor
5 years ago

Hi @alinave​ ,

It's me Aida. 😊 I believed this is similar issue with what you've posted in below thread. I have provided my reply in below thread.

https://forums.intel.com/s/question/0D50P00004bZOyx/emif-ip-fetches-error-while-simulating-in-vcs

Since you created this new case and this case just re-routed today to me , I suggest we continue our discussion using this new case. Let me know if you have any concern.

I copy my reply again here for tracking purpose:

Have you try to used this supported tools version for Xcelium for Quartus 19.4?

Also may I know which memory simulation model are you using (for example Micron or etc)?

Thanks

Regards,

Aida

  • alinave's avatar
    alinave
    Icon for New Contributor rankNew Contributor
    5 years ago

    Hi Aida,

    Thanks for your reply. I will check the simulation results with 2018.03 xcelium version. I have been using Micron memory model.

    Thanks,

    Naved