Forum Discussion
PGigl
Occasional Contributor
Occasional ContributorWe are having issue getting data out of the CIC core during simulation.
We have built up a QSYS design with our own core feeding into a CIC core, feeding into a FIR core. In our simulation we can see signals and data going into the core, and see the appropriate handshak...
CheepinC_altera
Regular Contributor
Regular ContributorHi,
Thanks for your update and sharing. Please allow me some time to look into them to see if can spot any anomaly. I will provide you an update on the progress by end of the week or as soon as there is any valid finding. Please ping me if you do not hear from me. Thank you.
PGiglOccasional Contributor
Occasional ContributorThe other thing we are looking at is how the BFMs are being called in the example versus the real design.
