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Altera_Forum
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16 years ago

verilog- parameterized mux

For the life of me I cannot figure out how to generate a parameterized mux in verilog... I understand how to generate, say, a 4:1 MUX of "N" bits wide... But I am trying to generate an N:1 mux...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Thanks again Jake for your help.. While cleaning up some of the project I found an optimization opportunity that greatly simplified the problem and made the mux much simpler. I really do appreciate your help though, I've learned a great deal from this thread!

thank you!

..dane