verifying tranceiver connections

I suggest you to read the transceiver chapter on your device handbook and look into the xcvr_user_guide.

Anyway it seems that you configure your xcvr ip to use a cmu pll as tx pll.

This mean that you use another xcvr cdr as tx pll.

To your pinout this imply that you have to leave a xcvr receiver not use in the middle of a triplet (channel 1 or 4 of a six pack).

If you add other channels at same datarate you can reuse the same tx pll also for the others.

In order to have this working you've to satisfy some rules (pll powerdown and phy resets to be driven by same signals and you have to give an assignment to say that all those tx channels are part of same xcvr group).

Note that for ethernet you could have used alse a fpll as tx pll and in this case you do not need to leave any space between the xcvrs.

Last but not least you need to instantiate a xcvr reconfiguration controller and all channels on the same triplets must use the same reconfig controller.

I suggest you to use one per side or one for the whole fpga. Pay attention that xcvr phy ip tell you how many reconfig controller interfaces they need.

I suggest you to split them in xcvr rcfg ip in case you use one for multiple phys: it will let your connections be easier.

I think that what I wrote will have no sense for you until you do not study xcvr from handbook or attend some online training (altera web site is full of them and they are free)!