Using Quartus 19.1 and Platform Designer on Windows I get an error when executing Generate on a Cycleone IV GX where I have instantiated a PCIe interface using PCIe hard IP. This works in QSys on Quartus 16. Is there a work-around or am I stuck using 16?

I am using 19.1 Lite. I could not find that file in the 19.1 install directory, but it does exist in my 16.1 directory: C:\intelFPGA_lite\16.1\ip\altera\ip_compiler_for_pci_express\lib Note that the path where the file exists in 16.1 is not the same as the path reported in the error message. The path in the error message is incomplete, and I can’t find a path that matches up with it. In particular, I can’t find any subdirectory named ip_compiler_for_pci_experss anywhere in 19.1. However, I do find a file named ip_compiler_for_pci_express.odip in C:\intelFPGA_lite\19.1\quartus\common\misc\outdated_ip. I tried removing the PCIe instantiation from my design and adding it back, but I still got the same error message when I tried to generate HDL. David Shroyer Delta Computer Systems, Inc. +1-360-254-8688 [email protected]