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andrecap's avatar
andrecap
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5 years ago

User MSI generation with DMA enabled

Hi, I'm having trouble in generating an MSI in my Endpoint FPGA. I am using Cyclone 10 GX with "Hard IP for PCI Express"(Avalon-MM) and DMA support. The MSI is already working when a DMA transac...
Rahul_S_Intel1's avatar
Rahul_S_Intel1
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5 years ago
Have you tried any of example design or you have tried from your own logic
  • andrecap's avatar
    andrecap
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    5 years ago

    Hi Rahul,

    Thanks for your reply.

    we are building our own logic from scratch.
    The FPGA is placed on a hardware board we are also developing.

    I am writing into the registers from the Root Complex, and I can verify the CRA registers are written correctly through signal tap.

    Is it possible that I am getting something wrong in the procedure?

    Regards,

    Andrea

  • Rahul_S_Intel1's avatar
    Rahul_S_Intel1
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    5 years ago

    Hi ,

    Taking the conversation to private