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vsath's avatar
vsath
Icon for New Contributor rankNew Contributor
7 years ago

usage of SGDMA IP for data transfer to and from DDR3

Hi, I want to develop a system with NIOS II Processor on Arria V of one of our custom boards for DDR3 memory transfers. where as there will be a sensor which will be giving around 128 bit data per...
NurAida_A_Intel's avatar
NurAida_A_Intel
Icon for Frequent Contributor rankFrequent Contributor
7 years ago

Hi,

Also you may refer to Intel FPGA wiki that consist some generic MSGDMA and EMIF design.

Hope this helps.

Thanks

Regards,

NAli1