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New ContributorTSE SGMII autonegotiation fails and link goes down after ethernet cable connection
Regular ContributorHi Marco,
As you are facing system level failure, hence it's hard to tell which path went wrong in the first place.
- Is it FPGA design ? On board PHY chip configuration ? your board setup issue ? or the destination Ethernet port or equipment issue
May I suggest you start with something simple to slowly isolate the failure
- You can generate the TSE simulation example design, run the sim to get expected signal behaviour to cross check with your hardware design
- Alternatively, you can also use below TSE reference design to debug your issue
- https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an647.pdf
Thanks.
Regards,
dlim
- MRigh4
Thank you for the answer dlim.
It is a FPGA design, completely HW based, without NIOS processor. VHDL FSMs configure both the PHY and the TSE.
Actually it seems to be a system level issue. I tried to understand this behaviour for a week without success. During all my tries, for some reasons I also tried to connect the board to another ethernet device (is the USB docking station of the PC, with a ethernet interface) and it seems that the autonegotiation issue is not present here. I can transfer packets from PC to FPGA and viceversa.
Now I think that the problem is relevant the autonegotiation phase between the TI PHY and the external device... and not relevant the configuration of the TSE so I don't think that a simulation of the TSE would help but I'm still trying to figure out a solution.
If you have other suggestion, I will appreciated it.
Thank you,
Marco.
