Forum Discussion
SKon1
Occasional Contributor
Occasional ContributorTSE - PCS only internal loopback problem
Hello, I'm using the TSE core in a PCS only configuration on an Arria V FPGA. https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_ethernet.pdf Data is being sent from my...
SengKok_L_Intel
Regular Contributor
Regular ContributorHi,
I can see the same behavior in simulation, and yes this is expected behavior. This behavior won't impact the functionality of the IP. For detailed info, you may refer to the following errata.
https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/solutions/fb162858.html
Regards -SK
