to use altlvds,how I can use LVDS bit clock and LVDS frame clock of ADC at the same t

I do not believe the DDIO will close timing at those speeds. altlvds uses a lot of dedicated hardware to make timing closure easier.

If you use frame clock, why are some of the parallel data bits an error? I missed that.

If using the bit clock, I've seen some ADCs that can send a fixed pattern that you can use to calibrate on in logic. A bit of a pain to do though. Capturing the frame transitions and then just shifting the parallel data to align the word would be the easiest.

What about creating two altlvds blocks with external PLL, one to capture the data and one to capture the frame bit. Then have a single external PLL drive both. I think a PLL can drive two altlvds blocks. (Throw something down quickly and make sure it fits before really making sure the clocks are correct and what-not).