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Altera_Forum
Honored Contributor
Honored ContributorThroughput Efficiency with half-rate DDR2 controller
I have been developed system which performs simultaneous writing and reading of the same DDR2 RAM (reading from the first half, writing to the second half). Read and write data (32 bit width) are dig...
Altera_ForumHonored Contributor
Honored ContributorOk, I used last chance: convert system from SOPC Builder to Qsys. It solves the issue. Now it works with efficiency near to maximum available.
So, the issue was caused by SOPC Builder. PS Quartus 12.1 (with and w/o service pack) was used.
