Forum Discussion
Altera_Forum
Honored Contributor
11 years agoMy suggestion would be to try to capture the event on SignalTap in order to gain better understanding of where the issue is.
Tap signals on: - SDRAM slave port - SGDMA master port - SGDMA Avalon-ST sink (from ADC) and figure out at which stage the 00's are getting introduced. If 00's are never on the Avalon-ST and is reliably there on the SGDMA Avalon-MM Master port, then yes it sounds like a bug in the SGDMA and you would need to dig inside it a bit further.