Forum Discussion
Altera_Forum
Honored Contributor
12 years agoHi Simon,
--- Quote Start --- I don't it's a power-on timing issue in my case. The board is programmed, then do a host reboot, during this reboot period, the PCIE bus is actually still powered, but will let the BOIS re-enumerate the board.* But it works on motherboard with Intel C210 chipset but not with Intel C600 chipset. Any ideas/thoughts are much appreciated. Thank you very much. --- Quote End --- Trace the power-on sequence using SignalTap II, or a PCIe logic analyzer if you have one :) This thread has a link to some PCIe analysis I did on Stratix IV and Cyclone IV boards. http://www.alteraforum.com/forum/showthread.php?t=35678 Have you tried Stratix V CvP? For example, you should be able to power-up your board with an absolutely minimal FPGA configuration which configures "as fast as is possible". If that works, then you will at least know the problem is related to the power-on sequence of your design. Cheers, Dave