Forum Discussion

New Contributor

4 years ago

Stratix 10 Transceiver MGTREFCLK in LVDS

Hello, I have a question regarding the reference clocks for the Stratix 10 transceivers: Is it OK to set their I/O standard LVDS with Differential Input Termination? The Stratix 10 Dev Kit has ...

CheepinC_altera

Regular Contributor

4 years ago

Hi,

Thanks for your update. Please share with me your test design to further look into. By the way, just to check if your XCVR refclks are connected to XCVR instances ie Native PHY?

Thank you.