Forum Discussion
Mircea
New Contributor
5 years agoStratix 10 Transceiver MGTREFCLK in LVDS
Hello,
I have a question regarding the reference clocks for the Stratix 10 transceivers:
Is it OK to set their I/O standard LVDS with Differential Input Termination?
The Stratix 10 Dev Kit has ...
CheepinC_altera
Regular Contributor
5 years agoHi,
Thanks for your update. Please share with me your test design to further look into. By the way, just to check if your XCVR refclks are connected to XCVR instances ie Native PHY?
Thank you.
- Mircea5 years ago
New Contributor
Hi,
Please, see the LVDS_Test.qar file attached.
Thank you.