Forum Discussion
Minh_Le
New Contributor
4 years agoSimulation unbound warning
Hi,
I'm working on simulation with IP cores and having issue with unbound components. Specifically, the Questa compiler complains about the dcfifo mixed width have declared and instantiated interfa...
ShengN_altera
Super Contributor
4 years agoHi Minh,
Check out this document https://faculty-web.msoe.edu/johnsontimoj/EE3921/files3921/ug_fifo.pdf (page 31) onwards.
You can turn on FIFO Embedded ECC feature by enabling enable_ecc parameter in the FIFO Intel FPGA IP GUI.
Embedded memory ECC feature is only available for M20K memory block type.
When you enable the ECC feature, a 2-bit wide error correction status port (eccstatus[1:0]) will be created in the generated FIFO entity.
Best Regards,
Sheng
p/s: If any answer from community or Intel support are helpful, please feel free to mark as solution and give Kudos.