Forum Discussion
TSchu3
Occasional Contributor
6 years agoSimulating Triple Speed Ethernet, Decryption Fails
Hello, I am trying to simulate the TSE testbench IP generated with Quartus Prime Standard 18.0. My simulator is Cadence Xcelium. Xcelium cannot decrypt the TSE testbench submodules. I have not enco...
Deshi_Intel
Regular Contributor
6 years agoHI Travis,
I think I figure out what's the issue now.
I cross check Quartus release note doc and found out Xcelium sim tool is only supported in Quartus Pro edition and not supported in Quartus Standard edition.
Attached is the screenshot of Quartus release note doc vs TSE sim model generated in example design.
- I used Quartus v19.1 standard edition to generate Cyclone V TSE example design
- Then I used Quartus v19.1 pro edition to generate Arria 10 TSE example design
Yet, Cyclone V is not supported in Quartus Pro edition as it's older generation FPGA.
So, I am afraid I need to ask you to switch to other simulation tool since you are using Cyclone V FPGA. if you are able to upgrade to newer generation FPGA like Arria 10 or Stratix 10, then it's fine to use Xcelium.
Thanks.
Regards,
dlim